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BTech/ MTech in Engineering with 15 to 18 years of actual work experience in Hardware Design Architect.Worked on PCIE/LPDDR5/UCIE/Ethernet/MIPI Protocol Designs. Prepare SOC hardwareArchitecture Specification to Start the Design and Verification Implementation. Verilog / System-Verilog RTL logic design, debug, and functional verification supportN/A
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