Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world’s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at
www.silabs.com
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Job Description
The position involves designing, developing and deploying UVM/C based Testbenches for multi-core, multi-threaded processor subsystems with emphasis on verifying and signing off performance and power along with functionality. The candidate should have worked on architecture of chip-level testbenches and verification of SoCs and chipsets with ARM Cortex and proprietary processor technology and AMBA AHB/AXI/APB along with peripheral interfaces like SDIO, UART, I2S, I3C, PWM.
Responsibilities:
- Develop and track execution of chip level test planning to meet product requirements and established quality standards
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Lead a team to complete the pre-silicon verification of an SoC
- Execute and maintain chip level verification regressions. Triage and debug failing tests.
- Develop or update tests to satisfy the test plan requirements. Tests will be combination of directed (C tests), constrained random (UVM), and formal verification.
- Perform gate level verification across corners. Provide appropriate activity files for power analysis.
- Coordinate verification activities with a global team and the design lead. Provide succinct weekly status and drive action items to closure.
Experience Level: 12-15 years in Industry
Education Requirements: Bachelor or Master’s degree in Electrical and/or Computer Engineering
Minimum Qualifications:
- Develop and signoff on test plans and test cases
- Strong knowledge of digital design and AMBA AHB/AXI/APB based SoC Architecture
- Strong knowledge of Verilog, System Verilog, UVM, C/C++
- Experience in usage of assertions, constrained random generation, functional/code coverage.
- Knowledge of scripting languages like Perl, Python, Tcl, shell to achieve automation of verification methodologies and flows
- Very strong Analytical debugging skills
- Knowledge on C Based Testcases.
- Knowledge of SoC,Memory and Cache Architectures
- Knowledge on Low power designs and architectures
- Verify and debug low-power design
- Debug SDF Back Annotated Gate Simulations
- Low-power implementation (UPF)
- Mixed Signal Real Number Modeling (RNM, Spice)
Preferred Qualifications:
- Knowledge of high-speed interfaces like Quad/Octa-SPI
- Knowledge of peripheral interfaces like SDIO, UART, I2S, I2C, PWM, CAN
- Knowledge of wireless technologies like WLAN, Bluetooth, ZigBee
- Mentoring skills
- Exceptional problem-solving skills
- Good written and oral communication skills
Benefits & Perks:
Not only will you be joining a highly skilled and tight-knit team where every engineer makes a significant impact on the product; we also strive for good work/life balance and to make our environment welcoming and fun.
- Equity Rewards (RSUs)
- Employee Stock Purchase Plan (ESPP)
- Insurance plans with Outpatient cover
- National Pension Scheme (NPS)
- Flexible work policy
- Childcare support
Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.
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